Agendas

Session of Open-source Chip Ecosystem based on RISC-V (OCERV)

Address: Yihe Hall Time: 05/ 26 14:00 ~ 17:40

14:00-14:10 Leaders’ remarks
14:30-15:00 Achievement Release
14:30-15:00

Prof. SUN Ninghui, Academician of Chinese Academy of Engineering

XiangShan: A High-Performance and Open-sourced RISC-V Processor

2.Prof. BAO Yungang, Deputy Director of Institute of Computing Technology, CAS

Eulix OS: A Native and Open-sourced Operating System for RISC-V

3.Prof. WU Yanjun, Deputy Director of Institute of Software, CAS

15:00-17:40 Keynote speeches
15:00-15:20

<Open-Source Hardware and Software>

Prof. LIAO Xiangke, Academician of Chinese Academy of Engineering

15:20-15:40

Prof. LIU Ming, Academician of Chinese Academy of Sciences

15:40-16:00

< RISC-V is Inevitable>

Mrs. Calista REDMOND , CEO, RISC-V International

16:00-16:20

< RISC-V Everywhere >

4.Mr. Mark HIMELSTEIN CTO, RISC-V International

16:20-16:40

< OpenHW Group’s Global, Open-Source Processor Core Ecosystem>

Mr. Duncan BEES Director, OpenHW Group

16:40-17:00

<A New Wave of Chip Design Innovation: Open Source Chip>

Prof. BAO Yungang, Deputy Director of Institute of Computing Technology, CAS

17:00-17:20

<Open Architecture and System Integration Drive Chip Ecosystem Innovation>

Dr. SONG Jiqiang, Managing Director of Intel Lab China

17:20-17:40

<RISC-V Software Ecosystem: Status and Trends>

Prof. WU Yanjun, Deputy Director of Institute of Software, CAS

*The final agenda is subject to the actual